Tools that Make Hardware and Software Design Much Easier

You can put the WOW into your DPU design using Tensilica's patented, automated processor generation process. Our hardware/software design tools work in a specially tailored version of the Eclipse IDE for maximum productivity.

Designers with existing application software code can profile the application, identify hot spots, add new instructions and execution units to optimize performance, and regenerate a new DPU – all within a matter of hours.

Once you've specified the instruction set for your DPU, our tools generate a complete software tool chain including our optimizing XCC C/C++ compiler, debugger, simulator, models and much more. So your software development team has everything it needs to take advantage of the optimizations you made.

Guaranteed Correct by Construction

Configurability of a Tensilica processor core never compromises the underlying base Xtensa instruction set, thereby ensuring availability of a robust ecosystem of third party application software and development tools.

All configurable, extensible Xtensa processors are always compatible with major operating systems, debug probes and ICE solutions; and always come with an automatically generated, complete software development toolchain including an advanced integrated development environment based on the ECLIPSE framework, a world-class compiler, a cycle-accurate SystemC-compatible instruction set simulator, and the full industry-standard GNU toolchain.

A Perfect Match for Your DPU

Tensilica's automated process automatically generates the complete matching software tool chain.

Automated hw/sw generation

Did You Know?

Did You Know?

Qualcomm Atheros uses Tensilica DPUs in their high-volume, ultra-low-power GPS, WiFi and Bluetooth designs.